수상

• Leading Lawyer: TMT (리걸타임즈, 2023-2025)
• 삼성전자 반도체총괄 사장상: 반도체 설비국산화부문 최우수상 (삼성전자, 2005)
• 삼성전자 메모리사업부장상: D램 TIT Capacitor 상부전극 공정개발 (삼성전자, 2005)
• 삼성전자 반도체연구소장상: D램 VIA PLUG 공정개발 (삼성전자, 2002)

저서 및 외부활동

• 외국 특허괴물의 폐해를 억제하기 위한 ‘한국형 특허관리 사업모델’에 관한 연구, 경영과 법 제 4권 (공저, 서강대학교 법학연구소, 2010.12.)
• “Investigation of the Contact Resistance Between Ti/TiN and Ru in M1/Plate Contacts of RIS (Ruthenium Insulator Silicon) Capacitor”, JJAP (Japanese Journal of Applied Physics) (공저, 2003)
• “Plasma Induced Damage on Sub-50Ågate Oxide by PE-CVD Ti”, PPID (Plasma and Process Induced Damage) (공저, 2003)
• “The Improved CVD-Al Metallization for Deep Small Contact Filling Using Selective Wetting Process”, IITC (International Interconnect Technology Conference) (2003)
• “Synthesis of Polyimides Containing Triazole to Improve Their Adhesion to Copper Substrate”, Journal of Adhesion Science and Technology, Vol.16, 1839-1851 (2002)
• “Enhancement of Contact Filling Characteristics in CVD-Al Metallization with Plasma-Treated MOCVD-TiN Wetting Layer”, AMC (Advanced Metallization Conference) (2002)
• “Investigation of the Contact Resistance Between Ti/TiN and Ru in M1/Plate Contacts of RIS (Ruthenium Insulator Silicon) Capacitor”, SSDM (Solid State Device Materials) (공저, 2002)

 

• 발명특허: 국내등록특허 34건; 해외출원특허 32건 (2009년 기준)